Integrated circuit chip carrier

ABSTRACT

An IC chip carrier has a base formed from a film of dielectric material and a system of oriented and fixed conducting paths on a top surface of the base. A first group of the conducting paths is configured to mate directly with chip contact pads and a second group of the conducting paths is configured to mate with mating contacts on a circuit board. The IC chip carrier includes further a plurality of contacts for selectively connecting to the mating chip contact pads and the mating contacts on the circuit board. All contacts are formed as metallized vias having top edges coupled to the conducting paths on the top surface of the base, wherein bottom edges of the vias form contact assemblies with the mating contact pads of the chip or with mating contact pads of the circuit board. The contact assemblies are formed through joints filled with an electric-conductive binder, wherein the mating contact pads of the chip and the mating contact pads of the circuit board face the vias, and wherein the contact assemblies together with conducting paths are configured to electrically couple the chip contact pads directly with contact pads of the circuit board.

RELATED APPLICATIONS

This application is related to SINGLE-CHIP INTEGRATED CIRCUIT MODULE,application Ser. No. 09/529,034, filed on the same date.

FIELD OF THE INVENTION

The present invention relates to the development and manufacture of theequipment based on microelectronics items and semiconductor devices, andcan be widely used for checking and rejecting IC chips prior to theirmounting into packages or as a part of multichip modules, as well as formounting chips into packages or multichip modules. The invention isdirected onto reducing the cost of rejecting procedures for chips, fordecreasing the labor content of equipment assembly mounting processes,for increasing a yield percentage of fit items, and also for raising achip operation reliability in the equipment.

An application of this invention seems to be especially prospective inmanufacturing a large-scale electronic equipment with high specificcharacteristics in the form of multichip modules (MCM).

BACKGROUND OF THE INVENTION

At present, IC chip carriers on a film base, particularly on thepolyimide film, have a wide spreading. A high thermal stability,stability of electrophysical and thermomechanical characteristics inoperation, high mechanical rupture, tensile and breaking strength in thethickness range of 7 to 100 μm, resistance to chemical attacks and hightemperatures during technological treatment should be ascribed toadvantages of the polyimide based carrier. Such carrier ensures anautomation of mounting processes for chip with a large number of contactpads, since conducting paths on a carrier surface could be made with ahigh accuracy and disposed with a high density having a small, strictlyfixed gap between them.

A one-layer carrier with spider leads is known, manufactured from thepolyimide film with a copper or aluminum foil glued on it, in which foilconducting paths are etched by photolithography techniques. Chip contactpads are connected to the conducting paths by welding or solderingtechniques, and other, free ends of those paths are used for measuringand subsequent welding or soldering to mating contacts in a package orto a circuit structure in a packageless mounting (A. Yu. Ber, F. E.Minsker. <<Mounting of semiconductor devices and integratedmicrocircuits>>, Moscow, <<High School>> Publishing House, 1986,pp.147-150—in Russian).

A polyimide chip carrier is known, which is employed in manufacturing anelectronic equipment based on packageless LSIC, comprising a system ofrigidly oriented tape conductors (from copper or aluminum) of 20 to 30μm wide displaced on a surface of the polyimide film carrier and spacedin a chip area with a step compatible with a step of contact pads on thechip and in a carrier periphery with a step compatible with matingmounting pads on a circuit board. Besides, all conductors arerepresented by contacts displaced at carrier edges with a stepcompatible with a step of probe contacts in a measuring apparatus.Conductors being rigidly fixed relative to each other are welded to LSICcontact pads, and continuations of these conductors, after correspondingcutting, are welded or soldered to mating contact pads on the circuitboard. Thus, each contact pad of the chip and its mating contact pad onthe polyimide carrier along with a connecting element in the form of theconducting path on the polyimide carrier form a contact assemblyintended for coupling electrically the chip contact with the matingcontact on the circuit board. Prior to cutting the chip for mounting thechip onto the circuit board, the carrier with the chip is placed into acontact device of the measuring apparatus to monitor electrical andfunctional chip parameters and to reject imperfection chips (E. N.Panov,<<Peculiarities of assembling the application-specific high-integrationIC's on base array master chips>>, Moscow, <<High School>> PublishingHouse, 1990, pp.77-78,—in Russian).

A two-layer carrier is known which has metallized paths in two layersseparated by a polyimide insulation layer. Such carrier allows to mountchip having a large number of contact pads displaced along a chipperiphery, including those displaced in two lines as on a chessboard(ibid, p.78).

A two-layer carrier on a flexible base, comprising a signal layer,layers of the supply bus and ground bus insulated from each other, isknown. Conducting paths displaced on surfaces of polyimide carrierlayers are coupled to each other by means of metallized vias made in thepolyimide base of carrier layers. The coupling of conducting paths withIC chip contact pads is performed by means of welding.

Such carrier embodiment has permitted to avoid many problems inherent tocarrier on a rigid base, particularly an impossibility to optimizesignal buses and ground and supply buses within one layer, and to ensurea resistance to bending forces during technological operations (<<Secondbirth<< of the automated mounting of chips on a tape carrier. Expressinformation on the abroad electronic technology. Part 43-45 (5205-5207)of Mar. 1-5, 1991, Moscow—in Russian).

While mounting onto the circuit board, contact assemblies in thepolyimide carrier structure have electrical characteristicssubstantially better than corresponding characteristics of contactassemblies in cermet package structure (for which packages the way ofthe electric signal is: chip contact pad—transitional wireelement—mating contact pad of a cross-arm—transitional conductors in amultilayer circuit structure of the cermet package—package outputterminal) in basic electrical characteristics (a resistance value, aparasite terminal inductance and a parasite intra-terminal capacity).Besides, a usage of the polyimide carrier ensures a good matching ofwelded chip conductors and contact pads while mounting, whichsubstantially improves an automation of mounting processes and reducesthe cost of the chip mounting both in packages or within an equipmentassemblies based on packageless ones.

However, the above one-layer, two-layer and three-layer polyimide chipcarriers, solving tasks in improving the registration precision ofcontact pads and conductors and fixation of conductors relative to eachother, in improving the electrical characteristics of contact assemblieselements, in combining processes of parameter measurements, rejectionand mounting of chips on a circuit board in a single technologicalroute, have the following substantial disadvantages:

technological processes (welding the tape conductors to contact pads ofchips) are used in mounting, which can cause a defect formation in chipsand reduction of their reliability characteristics in operation;

the welding process is a non-group operation, i.e. each welded contactis processed individually, serially one after another, which reducessharply a mounting productivity and increases a probability of a weldingmachine malfunction, especially for multiterminal chips.

A technical decision most close to the present invention in thetechnical essence and obtained result when using is a chip carriercomprising a base from a dielectric material, polyimide, with conductingpaths formed on its surface, to which said chip is glued so as tocoincide contact pads with corresponding conducting paths on the carriersurface. After welding (or soldering) conducting paths to correspondingchip contacts, carrying out parameter testing and rejection of fitchips, a periphery chip area having measuring contact pads is cut off,and the remaining part of the carrier with the chip is positioned on acircuit board; then contact pads of a central carrier zone are welded(or soldered) to mating mounting pads on the circuit board (E. N. Panov,<<Peculiarities of assembling the application-specific high-integrationIC's on base array master chips>>, Moscow, <<High School>>PublishingHouse, 1990, p.78—in Russian).

The main disadvantages of this technical decision for complexmultiterminal IC are:

a usage of the defect-creating welding process;

a non-group character of the mounting process.

SUMMARY OF THE INVENTION

The problem, for which solving the present invention is directed, is toprovide a multiterminal chip carrier comprising contact assemblies of anoriginal structure, which usage permit to exclude the defect-creatingwelding process and to make the process of connecting the conductors tothe chip contact pads a group process, which leads to a significantreduction of a labor content and cost of a carrier assembling and chipmounting into a package or as a part of a multichip module for improvinga quality, reproducibility and reliability of connections.

In addition, a usage of the proposed contact assembly permits to solveone of the main problems of multichip modules, namely the rejection ofobviously fit chips prior to their mounting as a part of MCM, at thecost of improving the testability of packageless IC chips and ensuring atotal chip testing through output terminals of the carrier.

The indicated technical result is attained at the expense of usingspecial assemblies in the carrier structure, which ensure an electricaland mechanical coupling between contacts.

The set problem is solved with an attainment of the mentioned technicalresult by that in an IC chip carrier comprising a base of a dielectricmaterial with a system of oriented and fixed conducting paths on itssurface and contacts, ones of which are intended for connecting withmating chip contact pads and others are intended for connecting withmating contacts on a circuit board, which contacts are made in the formof metallized vias which top edges are coupled with the conducting pathson the top surface of the carrier base, and bottom edges of vias formcontact assemblies in joints with the mating contact pads of the chipor, respectively, with mating contact pads of the circuit board filledwith an electric-conductive binder, which assemblies together withconducting paths ensure an electric coupling of the chip contact padswith contact pads on the circuit board;

and also by that the metallized vias for the chip contact pads and forthe contact pads of a multilayer circuit board are made of differentdiameters;

and also by that the metallized vias are made in the form of a cylinder;

and also by that the metallized vias are made in the form of frustums ofa cone, the lesser bases of said frustums of a cone being faced to thecontact pads on the surface of the chip or multilayer circuit board andthe greater bases of said frustums of a cone being coupled with theconducting paths on the surface of the carrier base;

and also by that the metallized vias for contacting with the contactpads of the multilayer circuit board are made with metallized rings onthe top and bottom surfaces of the carrier base;

and also by that the metallized vias in the carrier for the chip contactpads can be made in the form of an array displaced over the surface ofthe chip having contact pads coincided in their placement with the arrayof the carrier vias;

and also by that the carrier base is made from the polyimide film;

and also by that the carrier can be made multilayer;

and also by that the top edges of metallized vias coupled with theconducting paths on the top surface of the carrier base are made withmetallized rings;

and also by that the conducting paths connecting the chip contact padswith the metallized vias at the periphery of the multilayer carrier aremade in the form of strip lines;

and also by that several IC chips are disposed on one multilayercarrier.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention is illustrated by drawings wherein FIG. 1, FIG. 1a, FIG. 2and FIG. 3 depict diagrammatically fragments of the proposed carrier.

FIG. 1 represents one of possible embodiments of the carrier inaccordance with the present invention.

FIG. 2 (in great ovals at the left and at the right) shows examples ofthe connection of the carrier output terminals with the mating contactsof external circuit structures: at the right—with the contact in theform of a flat contact pad, and at the left—with the contact in the formof a pin.

FIG. 1a shows in the enlarged view a contact assembly on which basis isembodied the carrier in accordance with the present invention.

FIG. 3 depicts a variant of the multilayer carrier (two layers) in whichthe conducting paths are made in the form of flat lines.

DETAILED DESCRIPTION OF THE INVENTION

A chip carrier (FIG. 1) consists of a circuit layer 1 being a base froma film insulating material as which a polyimide film, for example, canbe used, on a top surface of which film are displaced conducting paths4, 9, and on its bottom surface a chip 2 is fixed by means of anadhesive compound 3, for example. The conducting path 4 couples acontact assembly 5 with a metallized via 11 in the form of a frustum ofa cone, and a conducting path 9 couples a contact assembly 7 with ametallized via 21 in the form of a cylinder. The contact assemblies willbe described in more detail below by examples of FIG.2 and FIG. 1a.

In FIG.2 examples of connection of the carrier output terminals with themating contacts of external circuit structures are showndiagrammatically.

In the right oval is depicted the contact assembly 6 connecting acontact pad 14 on the surface of some circuit layer 18 with theconducting path 4 on the surface of the circuit layer 1 by means of ametallized ring 16, metallized via 15 in the form of frustum of a cone,and a conductive binder 17. The metallized path 4 is coupled with itsanother end with a contact pad 10 of the chip 2 by means of a metallizedring 12 of a metallized via 11 made in the form of frustum of a cone,and a conductive binder 13 of the contact assembly 5. The contactassembly 6 is similar by its structure embodiment to the contactassembly 5 and differs from the latter only by element sizes.

In the left oval is depicted a contact assembly 7 connecting a pincontact 19 fixed in some external circuit layer 20 perpendicularly toits surface and inserted into the mating metallized via 21 of a cylinderform, which is coupled through a metallized ring 22 with the conductingpath 9 on the surface of the circuit layer 1 of the carrier. Anelectric-conductive binder 23 in a gap between the pin contact 19 andthe metallized via 21 ensures a reliable coupling of element of thecontact assembly 7.

In FIG. 1a in an oval is depicted an enlarged fragment of the carrierhaving the contact assembly 5 in the form of a joint between a contactpad 10 of the chip 2 and the metallized via 11 in the insulation layer1, made in the form of frustum of a cone, the greater base of which iscoupled with the conducting path 4 on the top side of the carrierthrough the metallized ring 12. An electric-conductive binder 13introduced into the joint area couples the contact pad 10 of the chip 2and the metallized via 11 of the carrier into the common contactassembly 5.

In FIG.3 is depicted a multilayer IC chip carrier comprising at leasttwo insulation layers 1 and 24. Metallized paths 4 connecting thecontact assemblies 5 and 6 are disposed on the top surface of the firstinsulation layer. A metallized path 25 being the <<ground>> bus isdisposed on the top surface of the layer 24. The metallized paths 4 and25 form a strip line connecting the contact assemblies 5 and 6 and beinga guide for microwave signals.

In mounting the contact assemblies by means of a binder evaporation themetallized vias of the carrier are coincided with the contact pads ofthe chip fixed on the carrier, after which a mounted technologicalpacket is put into an evaporation apparatus, where a serial layer bylayer evaporation of conductive materials forming the conducting bindingstructure having required features is carried out. In such way a groupmounting of the contact assemblies coupling the chip contact pads withthe conducting paths and metallized vias for the output terminals isperformed. After connecting contacts in the evaporation apparatus, anoperation of visual and electric quality testing of the formed contactassemblies is performed, if necessary.

In mounting the contact assemblies by the soldering technique, atechnological packet (consisting of the carrier and the chip fixed onit) is placed into a vacuum soldering apparatus. In conditions of apartial vacuum and common heating till the solder fusion temperature,under capillary forces, a soldering of the joints in each contactassembly takes place simultaneously in the whole central zone of thecarrier.

An interaction of the carrier elements and chip during functioningoccurs as following (by example of the fragment in FIG.2).

A signal from the contact pad 14 of the circuit layer 18 passes throughthe electric-conductive binder 17, metallized via 15 in the circuitlayer 1, metallized ring 16, all of which form the contact assembly 6,into the conducting path 4 on the top side of circuit layer 1, and thenthrough the metallized ring 12, metallized via 11 in the circuit layer 1and electric-conductive binder 13 onto the contact pad 10 of the chip 2.

Similarly, a signal from the contact pad of the chip included as anelement in the contact assembly 7 through the conducting path 9 on thesurface of the circuit layer 1 of the carrier passes through themetallized ring 22, metallized via 21 of the cylinder form, andelectric-conductive binder 23 of the contact assembly 7 onto the contact19 in the form of a pin fixed in the circuit layer 20.

Thus, a manufacture of the chip carriers with the contact assemblies ofthe proposed structure allows to ensure:

a high reproducibility and reliability of a large number of the contactassemblies in a <<carrier—chip>> system;

a high interconnection density with the optimum number of layers (fromthe viewpoint of the carrier manufacture producibility and cost);

a high precision of mounting elements within the carrier, sufficient formounting the multilayer modules;

a structure simplicity determining the high producibility and low costin manufacturing the carriers, including multilayer ones;

a possibility to use the chips with an array placement of the contactpads uniformly dispersed on the chip surface, which is very topical inconnection with a growth of the contact pad number on the IC chips ofthe high-scale integration;

a simplicity and comfort in carrying out a reliable chip parametertesting when rejecting the obviously fit chips prior to their mountingwithin the one-layer and multilayer modules;

a usage of the multilayer carrier for the IC chips of the high-scaleintegration with a large number of the contact pads;

a testing and rejecting of the obviously fit IC chips with clockfrequencies in the range of gigahertz and their following packing intoone-chip and multi-chip modules;

a placement of several IC chips on one multilayer carrier.

What is claimed is:
 1. An integrated circuit (IC) chip carrier,comprising: a base formed from a film of dielectric material; a systemof oriented and fixed conducting paths on a top surface of the base,wherein a first group of said conducting paths is configured to matedirectly with chip contact pads and a second group of said conductingpaths are configured to mate with mating contacts on a circuit board;and a plurality of contacts for selectively connecting to the matingchip contact pads and the mating contacts on the circuit board, whereinsaid plurality of contacts are formed as metallized vias having topedges coupled to the conducting paths on the top surface of the base,and wherein bottom edges of the vias form contact assemblies with themating contact pads of the chip or with mating contact pads of thecircuit board through joints filled with an electric-conductive binder,wherein the mating contact pads of the chip and the mating contact padsof the circuit board face the vias, and wherein the contact assembliestogether with conducting paths are configured to electrically couple thechip contact pads directly with contact pads of the circuit board. 2.The IC chip carrier of claim 1, wherein the metallized vias forming thecontact assemblies with the chip contact pads and contact pads of amultilayer circuit board have different predetermined diameters.
 3. TheIC chip carrier of claim 1, wherein the metallized vias are formed ascylinders.
 4. The IC chip carrier of claim 1, wherein the metallizedvias are formed as frustums of a cone, smaller bases of said frustums ofa cone facing the contact pads on the surface of the chip or multilayercircuit board and larger bases of said frustums of a cone being coupledto the conducting paths on the surface of the carrier base.
 5. The ICchip carrier of claim 1, wherein the top edges of the metallized viascoupled to the conducting paths on the top surface of the carrier baseare made with metallized rings.
 6. The IC chip carrier of claim 1,wherein the metallized vias for contacting the contact pads of thecircuit board are made with metallized rings on the top and bottomsurfaces of the carrier base.
 7. The IC chip carrier of claim 1, whereinthe carrier base comprises a polyimide film.
 8. The IC chip carrier ofclaim 1, wherein the metallized vias in the carrier for the chip contactpads are formed as an array displaced over a surface of the chip whosecontact pads are displaced similarly to an array of vias of the carrier.9. The IC chip carrier of claim 1, wherein the carrier is a multilayercarrier.
 10. The IC chip carrier of claim 9, wherein the conductingpaths connecting the chip contact pads with the metallized vias at aperiphery of the multilayer carrier are formed as strip lines.
 11. TheIC chip carrier of claim 9, wherein several IC chips are disposed on onemultilayer carrier.
 12. An integrated circuit (IC) chip carrier,comprising: a base formed from a film of dielectric material; a systemof oriented and fixed conducting paths on a top surface of the base,wherein a first group of said conducting paths is configured to matedirectly with chip contact pads and a second group of said conductingpaths are configured to mate with mating contacts on a circuit board;and a plurality of contacts for selectively connecting to the matingchip contact pads and the mating contacts on the circuit board, whereinsaid plurality of contacts are formed as metallized conic vias havingtop edges coupled to the conducting paths on the top surface of thebase, and wherein bottom edges of the vias form contact assemblies withthe mating contact pads of the chip or with mating contact pads of thecircuit board through joints filled with an electric-conductive binder,wherein the mating contact pads of the chip and the mating contact padsof the circuit board face the vias, and wherein the contact assembliestogether with conducting paths are configured to electrically couple thechip contact pads directly with contact pads of the circuit board.